Abstract
As technology advances, more complicated systems requiring sophisticated algorithms often involving very complex digital signal processing (DSP) techniques are required. Therefore, hardware implementation of DSP algorithms has gained much attention during past years. One of the major applications of DSP is speech enhancement by eliminating the background noise. Spectral subtraction techniques in audio de-noising are widely used in real time applications. This paper focuses on developing a hardware software co-design of an audio de-noising algorithm based on spectral subtraction technique. An FPGA (Field Programmable Gate Array) implementation of the proposed hardware is achieved utilizing Xilinx Spartan 6 device and its performance estimation is also carried out in terms of resource utilization and timing requirement.
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