DSP design using VLIW architecture

Abstract

Programmable digital signal processors (pDSPs) are microprocessors that are specialized to perform well in digital signal processing intensive applications. A standard microprocessor can do most pDSP operations. However, the pDSP chip has better ability to perform number crunching algorithms in real-time, and pDSPs are highly flexible because they can be reprogrammed. The major objective of this research is to design and implement a general-purpose programmable DSP core (digital signal processor core). The architecture of the pDSP core must be designed in such a way that parallel processing can be exploited and computational units can be integrated into the core with ease. The pDSP designed is a fixed-point DSP based on a very long instruction word (VLIW) architecture. One way to overcome the performance limitation is to use field programmable gate array (FPGA) technology, a technology which gives the designer a higher degree of parallelism and ease of pDSP design.