Abstract
The existing method in PN code acquisition process have a problem in PN code acquisition time because PN code searching is accomplished in one epoch. In this paper, we propose algorithm that can reduce PN code acquisition time because PN code searching is accomplished in each other two epoches. The designed ASIC chip using proposed algorithm confirmed that the area (the number of gates) increase more than existing method in PN code acquisition, but the performance of PN code acquisition is better than existing method.
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