Driving voltage reduction in a two-phase CCD by suppression of potential pockets in inter-electrode gaps

Abstract

This study reports an optimum design for a two-phase charge-coupled device (CCD) and limitations on its driving voltage reduction. The two-phase CCD to be used as a horizontal-CCD (H-CCD) in a CCD image sensor requires low-voltage and high-speed operation. Reducing the driving voltage, however, may induce potential pockets in the channel under the inter-electrode gaps which results in a fatal decrease in charge-transfer efficiency. In this case it is necessary to optimize the CCD design to be free of pocket generation. For this requirement, we conducted two-dimensional (2-D) device simulations for the two-phase CCD, whose potential barriers are formed by boron ion-implantation. Our simulations indicated that the edge position of the potential barrier region and the dose of boron-ion implantation would be important parameters for controlling the size of potential pockets. At an optimum edge position and a boron dose, the minimum driving voltage appears to be reducible to 1.1 V. Characteristics of potential pockets and methods of their suppression are also discussed.