Driving forces behind SOC development

Abstract

Over the next five years what will drive higher levels of integration, methodology, and innovation in System On Chip (SOC) development? Will there be more emphasis on application specific chips, faster migration to submicron process technologies, exotic packages, revolutionary design automation tools, and IP reuse? This will depend on the economic value they present. For instance, the fast pace of process technologies over the past several years has been a two edged sword. On one side, it has created a great opportunity to integrate many functional blocks on a die. On the other end, high mask cost and long yield maturity posed major development cost and time-to-production issues. System In a Package (SIP) might be a more viable solution than a single die SOC for a higher level of integration of systems with diverse technology requirements.In this presentation, we will examine the vectors of cost, methodology, technology, and their interrelationship in SOC development. We will stress that now, more than ever, methodology and technology choices for SOC design and implementation have to be economically driven. If the high mortality rate of small chip companies and depressed earnings of larger ones over the past three years are any indication, we will see renewed interest in business fundamentals such as total available market (TAM) and return on investment (ROI). This is perhaps one of the most vivid changes we will all experience in the post bubble era.