Drift-diffusion quantum corrections for In<inf>0.53</inf>Ga<inf>0.47</inf>As double gate ultra-thin-body FETs

Abstract

With the growing interest in III-V-based nano-scale transistors as potential candidates for next-generation switches there is a need for efficient simulation tools capable to predict the impact of inherent quantum effects. In this paper we show how quantum drift-diffusion (QDD) models can be used to mimic those quantum effects. The models do not only properly account for geometrical confinement in Ino.53Gao.47As FETs with a body thickness below 12 nm, but also for source-to-drain tunneling, the main cause of rising OFF-current at gate lengths shorter than 25 nm. The parameters of the QDD models available in the commercial device simulator S-Device were calibrated with the help of the quantum transport code QT-Solver. Transfer characteristics of double-gate transistors with various gate lengths were computed. Their sub-threshold swings were extracted and used as metric for the comparison. Various QDD models, also in combination with a barrier tunneling model, were tested. The pre-factor of the density-gradient model in S-Device turned out to depend on normal electric field and body thickness. Expressions for both dependencies were implemented in the Physical Model Interface of S-Device. Good agreement for inversion layer density and sub-threshold slope obtained with the QDD models and those computed with QT-Solver was found for low and high source-drain bias.