Drift phenomena in CdSe thin film FET's

Abstract

Cadmium selenide TFT's operated at fixed gate and drain bias show a slow decay of the drain current. The time dependence of this decay was found to be logarithmic. Below room temperature the rate of decrease of the number of charge carriers in the surface-channel depends only weakly on both temperature and gate bias. These results can be described with a model in which tunnelling of electrons from the channel to traps in the oxide forming the gate insulation is assumed. As time proceeds the traps are filled by this process to an ever-increasing depth. Somewhat above room temperature a strong drift of a different nature occurs. In contrast to the low temperature drift, which can be suppressed by suitable treatment, this type of drift could not be removed. It presents a serious drawback to practical applications of the CdSe TFT. In several respects the TFT's used in this investigation differ from the conventional type. Their construction is briefly discussed.