DRAM World-line Bottom Roughness Detection Using BSE Signal

Abstract

The semiconductor device at 1x node has been an increasing challenge to detect and control as the scaling is reducing [1]. The Buried Word-line (BWL) of DRAM access transistor is a very critical component in DRAM [2]. Since the BWL profile significantly impacts DRAM performance, such as tRDL, retention time and so on [3], inline detection for BWL CD and roughness has been crucial of DRAM R&D and manufacturing.The Critical Dimension Scanning Electron Microscope (CDSEM) is the traditional workhorse solution for DRAM inline process control [4]. Measurements are extracted from top-down images based on secondary electrons (SE) collection. Only the topography (1-10nm) can be detected by using SE images. The BWL bottom profile, which is the real BWL, can’t be fully detected with SE signal during process control due to its deep trench profile. Hence, the back scattered electrons (BSE) detection is introduced in order to get deeper (10-100nm) detection. The high-energy BSE is emitted for material contrast and deeper features while SE reflects topography for the wafer surface [5]. The BSE detection also shows very good and measurable material distinction and sensitivity.In this article, a new methodology of BWL bottom roughness detection by using BSE signal is demonstrated. The different working point (WP), scan parameters, enhanced image quality (EIQ) setting and the energy filter (EF) value set by spectrometer offset were studied and tested on CDSEM tool. Results have been shown that the BWL bottom position roughness can be detected clearly and measured with BSE signal. This methodology can help to monitor the BWL roughness in different critical process steps.