Drain voltage induced barrier increasing of quantum-wire transistors

Abstract

In-plane quantum-wire transistors based on a modulation-doped GaAs/AlGaAs heterostructure are studied in the threshold regime. It is found that the threshold voltage VT of a quantum wire transistor depends on the applied bias voltage in a parabolic way. In particular, VT increases in the strong nonlinear transport regime with increasing bias voltage, which is in contrast to the drain voltage induced barrier lowering observed for submicron transistors. The increase of VT by a barrier increase along the channel with increasing bias voltage due to a self-depletion is explained.