Abstract
Stress drain bias dependent current model is proposed for sub-70-nm p-channel metal-oxide semiconductor field-effect transistors (pMOSFETs) under drain-avalanche-hot-carrier (DAHC-) mechanism. The proposed model describes the both on-current and off-current degradation by using two device parameters: channel length variation (ΔLSUBch/SUB) and threshold voltage shift (ΔVSUBth/SUB). Also, it is a simple and effective model of predicting reliable circuit operation and standby power consumption.
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