Abstract
AbstractTunnel field effect transistor (TFET) is a potential candidate to replace CMOS in deep‐submicron region due to its lower SS (subthreshold swing, <60 mV/decade) at room temperature. However, the conventional TFET suffers from low tunneling current and high ambipolar current. To overcome these two shortcomings, a new structure, known as Hetero‐dielectric gate TFET (HDG TFET), has been proposed in the literature. To analyze the electrical characteristics of this structure, a closed form of analytical expression of current is required. This paper presents the analytical current model for Hetero‐dielectric single gate (HDSG) TFET structure without using any iterative method. The developed analytical models show a good agreement with 2‐D TCAD simulator results. The model is used to study the electrical behavior of the proposed device under various physical and bias variations.
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