Double Shockley Stacking Fault Formation in Higher Doping Regions of PVT-Grown 4H-SiC Wafers

Abstract

In this study of 4H-SiC wafers, we report the observation of overlapping Shockley stacking faults generated from residual surface scratches in regions of higher doping concentration after the wafers have been subjected to heat treatment. The stacking faults are rhombus shaped and are bound by partial dislocations. The process is driven by the fact that a faulted crystal containing double Shockley faults is more stable than perfect 4H–SiC crystal at the high temperatures (>1000 C) that our samples have been subjected to during heat treatment. We have developed a model for the formation mechanism of the rhombus shaped stacking faults and the partial dislocation configuration has been verified using back reflection synchrotron topography. Our studies show that double Shockley faults can be generated in regions where dislocation sources are presents (eg. scratches or low angle boundaries) and when the nitrogen doping concentration exceeds a certain level when the crystals are subjected to heat treatment.