Abstract
A new design for high density integration greater than gigabits of perpendicular-magnetic-tunnel-junction (p-MTJ) spin-valve, called the double pinned (i.e., bottom and top pinned structures) p-MTJ spin-valve achieved a multi-level memory-cell operation exhibiting four-level resistances. Three key magnetic properties, the anisotropy exchange field (Hex) of the bottom pinned structure, the coercivity (Hc) of the double free-layer, and the Hc of the top pinned structure mainly determined four-level resistances producing tunneling-magnetoresistance (TMR) ratios of 152.6%, 33.6%, and 166.5%. The three key-design concepts are: i) the bottom pinned structure with a sufficiently large Hex to avoid a write-error, ii) the Hc of the double free-layer (i.e., ~0.1 kOe) much less than the Hc of the top pinned structure (i.e., ~1.0 kOe), and iii) the top pinned structure providing different electron spin directions.
Highlights
A new design for high density integration greater than gigabits of perpendicular-magnetic-tunneljunction (p-MTJ) spin-valve, called the double pinned perpendicular magnetic tunneling junction (p-MTJ) spin-valve achieved a multi-level memory-cell operation exhibiting four-level resistances
The researches on p-STT MRAM have been based on improving three device parameters of the p-MTJ spin-valves[11,12,13]: the tunneling magnetoresistance (TMR) ratio greater than 150% for ensuring a memory margin, the thermal stability (Δ = KuV/kBT, where Ku, V, kB, and T are the magnetic anisotropy energy, the volume of the free ferromagnetic layer, the Boltzmann constant, and the temperature, respectively) above 75 for a ten-year retention-time, and the switching current density of about 1 MA/cm[2] for low power consumption
The conventional double MgO based p-MTJ spin-valve consist of upper and lower synthetic anti-ferromagnetic (SyAF) [Co/Pt]n multilayer separated by a Ru spacer, a Co2Fe6B2 magnetic pinned layer, a MgO tunneling barrier, and Co2Fe6B2 magnetic free layers, as shown in Fig. 1a: called a single pinned p-MTJ spin-valve[18]
Summary
A new design for high density integration greater than gigabits of perpendicular-magnetic-tunneljunction (p-MTJ) spin-valve, called the double pinned (i.e., bottom and top pinned structures) p-MTJ spin-valve achieved a multi-level memory-cell operation exhibiting four-level resistances. The researches on p-STT MRAM have been based on improving three device parameters of the p-MTJ spin-valves[11,12,13]: the tunneling magnetoresistance (TMR) ratio greater than 150% for ensuring a memory margin, the thermal stability (Δ = KuV/kBT, where Ku, V, kB, and T are the magnetic anisotropy energy, the volume of the free ferromagnetic layer, the Boltzmann constant, and the temperature, respectively) above 75 for a ten-year retention-time, and the switching current density of about 1 MA/cm[2] for low power consumption. We investigated static magnetic properties of the double pinned p-MTJ spin-valve, tested the achievement of four-level magnetic-resistance states, and analyzed the operation mechanism of four-level resistances
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