Double-π fully scalable model for on-chip spiral inductors

Abstract

A novel double-π equivalent circuit model for on-chip spiral inductors is presented. A hierarchical structure, similar to that of MOS models is introduced. This enables a strict partition of the geometry scaling in the global model and the model equations in the local model. The major parasitic effects, including the skin effect, the proximity effect, the inductive and capacitive loss in the substrate, and the distributed effect, are analytically calculated with geometric and process parameters in the local-level. As accurate values of the layout and process parameters are difficult to obtain, a set of model parameters is introduced to correct the errors caused by using these given inaccurate layout and process parameters at the local level. Scaling rules are defined to enable the formation of models that describe the behavior of the inductors of a variety of geometric dimensions. A series of asymmetric inductors with different geometries are fabricated on a standard 0.18-μm SiGe BiCMOS process with 100 Ω/cm substrate resistivity to verify the proposed model. Excellent agreement has been obtained between the measured results and the proposed model over a wide frequency range.