Abstract
Continuum downscaling of MOSFET devices requires of ultra-shallow junction formation. Performance of the source and drain from B and As low energy implant and subsequent annealing is seriously affected by the presence of the Si–SiO 2 interface. Dopant loss due to segregation and dopant pileup at the interface during the transient enhanced diffusion (TED) are crucial phenomena for current and future CMOS devices. In this work we have implemented the Oh-Ward model [Y.-S. Oh, D.E. Ward, Tech. Dig. Int. Electron Devices Meet. 1998 (1998) 509] for the dopant behaviour at the interfaces integrated in an atomistic kinetic Monte Carlo simulator. Dopant traps at the interface can capture from or emit to either side of the interface. Furthermore, segregation of dopants and saturation of the interface by the presence of other species are also included. As a test of the model, low energy implants through a screen oxide have been simulated. When annealing these very shallow implants, a pileup at the interface is observed. The mechanisms involved in this process, as well as its dependence on the implant dose and energy are discussed.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.