Dopant segregation in SOI Schottky-barrier MOSFETs

Abstract

We present experimental results on silicon-on-insulator Schottky-barrier MOSFETs with fully silicided NiSi source and drain contacts. Dopant segregation during silicidation was used to improve the device characteristics: on-currents, significantly higher than without dopant segregation as well as an almost ideal off-state are demonstrated in n-type as well as p-type SB-MOSFETs. Temperature dependent measurements show that the effective Schottky-barrier height in devices with segregation can be strongly lowered. In addition, we investigate the dopant segregation technique with simulations. Comparing simulations with experiments it turns out that the spatial extend of the segregation layer is on the few nanometer scale which is necessary for ultimately scaled devices. Furthermore, the use of ultrathin-body SOI in combination with ultrathin gate oxides results in an even further increased transmission through the Schottky barriers and consequently leads to strongly improved device characteristics. As a result, the dopant segregation technique greatly relaxes the requirement of low Schottky-barrier silicides for high performance transistor devices.