Abstract
The realization of computing in memory based on SRAM(SRAM-CIM) can be divided into three domains: analog domain (AD-CIM), time domain (TD-CIM), and digital domain (DD-CIM). However, there exist corresponding disadvantages to the above methods. For AD-CIM, the calculation accuracy is poor. Moreover, the output stability of TD-CIM is limited. With a large overhead area, the layout and wiring of DD-CIM are complicated. Aiming to solve the shortcomings, this paper proposes a spike-domain circuit based on a pulse edge counting scheme. The circuit uses digital logic to realize the MAC operation, which is less affected by power, voltage, and temperature (PVT) and performs higher calculation accuracy. The circuit is transmitted serially through the delay chain to achieve a smaller area overhead. At 28 nm, the circuit accomplishes energy efficiency (EF) with 138.04TOPS/W for 4-bit multiplication and addition (MAC) operations, enabling full precision output and 3.42 times less energy consumption per operation than the previous SRAM-CIM.
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