Abstract

On-chip electrostatic discharge (ESD) protection is required to protect ICs against ESD failures of various origins. While ESD protection against human body model (HBM) ESD failures has been very successful, charged device model (CDM) ESD protection design emerges as a new challenge for ICs at advanced technology nodes. This paper reports a comparison study of CDM ESD protection versus HBM ESD protection. It found that the current practices of using conventional pad-based ESD protection networks for CDM ESD protection may not work. This study leads to a game-changing question to the field: Are existing CDM ESD protection approaches fundamentally faulty? It therefore calls for a completely new on-chip CDM ESD protection method to truly resolve the real-world CDM ESD failure problems.

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