Abstract
An overview is given on how to tackle the question of the electrical activity of extended defects which are inevitably present in hetero-epitaxial III-V layers on silicon. Analysis methods are described which rely on simple device structures containing a specific type of extended defect (here, threading dislocations). Applying the same methods to real scaled FinFETs is rather challenging. Instead Generation-Recombination noise spectroscopy provides data that can be compared with other more standard techniques, like Deep-Level Transient Spectroscopy (DLTS) in order to identify the presence of an electrically active extended defect in the channel material.
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