Distribution of Local Thermal Residual Stress in Thin Chips Stacked by Flip Chip Structures

Abstract

Mechanical reliability issues such as cracking of LSI chips and shift or deterioration of electronic performance of them caused by mechanical stress and strain in multi devices sub-assembly (MDS) structures were discussed analytically and experimentally. Local thermal deformation due to thinning of the LSI chips for mobile application causes large distribution of residual stress from ?300 MPa to +150 MPa in the chips. The values of the maximum and the minimum stresses are strong functions of the thickness of the LSI chips and period of area-arrayed small bumps. In flip chip assembly structures, periodic stress or strain distribution appears in the thinned chips depending on the period of the area-arrayed bumps. The amplitude of the stress often exceeds 100 MPa, and it may cause the change of electronic performance and reliability of devices. In addition, both the amplitude and the average stress vary among the three-dimensionally stacked thin chips due to macroscopic bending of the assembled structure. Therefore, it is very important to optimize the MDS structures to minimize the stress and thus, to improve the reliability of products.