Distributed Test Pattern Generation for Stuck-At Faults in Sequential Circuits

Abstract

Automatic test pattern generation (ATPG) remains one of the most complex CAD tasks. Therefore, numerous methods were proposed to speed up ATPG by using parallelism. In this paper, we focus on parallelizing ATPG for stuck-at faults in sequential circuits by combining fault and search space parallelism. Fault parallelism is applied to so-called easy-to-detect faults. The main task of this approach is to find a best-suited partitioning of the fault list, based on dependencies between faults. For hard-to-detect faults left by fault parallelism, search space partitioning is applied, integrating depth-first and breadth-first search. Since a small test set size is mandatory for a cheap test and fault parallelism increases the number of test patterns, test set compaction is done in a post-processing phase. Results show that our approach is not only capable of achieving potentially superlinear speedups, but also improves test set quality. The parallel environment we use consists of a network of 100 workstations connected via ethernet.