Abstract

The integration of dislocation-free Ge nano-islands was realized via selective molecular beam epitaxy on Si nano-tip patterned substrates. The Si-tip wafers feature a rectangular array of nanometer sized Si tips with (001) facet exposed among a SiO2 matrix. These wafers were fabricated by complementary metal-oxide-semiconductor (CMOS) compatible nanotechnology. Calculations based on nucleation theory predict that the selective growth occurs close to thermodynamic equilibrium, where condensation of Ge adatoms on SiO2 is disfavored due to the extremely short re-evaporation time and diffusion length. The growth selectivity is ensured by the desorption-limited growth regime leading to the observed pattern independence, i.e. the absence of loading effect commonly encountered in chemical vapor deposition. The growth condition of high temperature and low deposition rate is responsible for the observed high crystalline quality of the Ge islands which is also associated with negligible Si-Ge intermixing owing to geometric hindrance by the Si nano-tip approach. Single island as well as area-averaged characterization methods demonstrate that Ge islands are dislocation-free and heteroepitaxial strain is fully relaxed. Such well-ordered high quality Ge islands present a step towards the achievement of materials suitable for optical applications.

Highlights

  • The major hurdles towards high crystal quality heterostructure growth are represented by the lattice mismatch (4.2%) and the coefficient of thermal expansion (CTE) mismatch (130%) existing between the Ge heteroepilayer and the Si substrate[7]

  • By means of transmission electron microscopy (TEM) and synchrotron radiation grazing-incident X-ray diffraction (SR-GIXRD), we experimentally demonstrate the achievement of fully coherent Ge islands, featuring very low Si interdiffusion, very high selectivity in predefined nano-seed areas, narrow shape and size distribution

  • The SiO2 surface is atomically flat considering that the root mean square (RMS) roughness of the same wafer extracted from a 5 × 5 μm[2] atomic force microscopy (AFM) image is only ~ 3 Å

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Summary

Introduction

The major hurdles towards high crystal quality heterostructure growth are represented by the lattice mismatch (4.2%) and the coefficient of thermal expansion (CTE) mismatch (130%) existing between the Ge heteroepilayer and the Si substrate[7]. The thermodynamic-equilibrium epitaxy of Ge on Si (001) follows the Stranski-Krastanov (SK) growth mode, resulting in the nucleation of randomly distributed, size inhomogeneous[9], and highly Si-Ge intermixed[10] self-assembled Ge islands on top of a ~0.5 nm-thick Ge wetting layer In view of their possible use in Ge-based devices, numerous solutions have been proposed to achieve spatial and shape control of these self-assembled Ge islands, such as pit-patterning[11,12,13], SiGe buffer layers[14,15,16,17], epitaxial oxide buffer layers[18,19], and the use of surfactants[20,21]. We could define the process conditions leading to a pattern-independent selective growth

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