Discussion on: “UDU Factored Discrete-time Lyapunov Recursions Solve Optimal Reduced-order LQG Problems”

Abstract

1. Robustness. The control design must be insensitive to both parametric errors and unmodeled dynamics in the design plant. 2. Constraints on the compensator order. Because of limited control processor throughput, there is an inherent implementation constraint on the order of the compensator. In addition, reduced-order compensators are desired because they are easier to analyze. 3. Additional constraints on the compensator architecture. All design constraints are not captured by modern cost functions (in particular H2,H1, L1 or ‘1 cost functions). Some of these additional constraints, e.g., the need for an integrator in the controller or the need for a decentralized control structure, place additional constraints on the control architecture. 4. Digital implementation. Almost all modern controllers will be implemented in a digital processor. In addition, it is very common to obtain the design plant through digital system identification, which naturally results in a discrete-time design plant. Hence, the need for digital implementation can be accommodated by designing a discrete-time compensator using a discrete-time representation of the plant.