Abstract

Discusses the implementation of reconfigurable Direct Form I discrete time fiber-optic signal processors incorporating optical amplifiers. The implementation of IIR and FIR cells using 2/spl times/2, M/spl times/N, and switching matrices is considered, and the required design conditions to be fulfilled are pointed out in each case. Once the concept is established, we address several topics related to the relevant signal degradation sources, namely noise and round-off errors.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

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