Directed self-assembly aware restricted design rule and its impact on design ability

Abstract

Directed self-assembly (DSA), the epitaxial alignment of block copolymers to minimize the system free energy, is prone to defects that are random and difficult to eliminate. When creating fins for FinFET devices, the defect density is known to be a strong function of guide pattern CD. We propose the use of a restricted design rule (RDR) that limits the guide pattern CD to achieve low defectivity, and also report its impact on overall chip area and design-ability of logic, analog IO, and SRAM. The restricted design rule in defining guide pattern CD is extracted from empirical data. Design rule check (DRC) is applied to GLOBALFOUNDRIES' technology chip design to estimate the penalty of DSA RDR on fin layer.