Abstract

The development of various low temperature wafer bonding methods in early 2000’s marked an important milestone for the direct wafer bonding applications. Wafer bonding was adopted in the microelectronics fabs as the use of plasma activated wafer bonding allowed for meeting the CMOS manufacturing requirements in terms of contamination control as well as thermal budget limitations (less than 400°C).A wafer bonding technique reported in the literature already in late 80’s – early 90’s allowed even for room temperature bonding of some materials but despite this important feature it remained mainly at the fundamental research level, with not so numerous applications in semiconductor industry. This technique is known mainly as “surface activated bonding”, “SAB” or “room temperature covalent bonding”. Over the past decade, the interest in surface activated bonding increased significantly as excellent results were reported particularly for compound semiconductors applications (e.g. solar cells manufacturing, power devices, etc.). With three types of direct wafer bonding processes, high, low and room temperature, sometimes people are facing issues in selecting the proper wafer bonding process. Our goal in this presentation is to introduce the specific features of each technique and present their benefits with applications examples. Technical as well as cost – related benefits will be emphasized.An overview of the main metrology methods used traditionally for wafer bonding-based applications, as well as new methods adopted based on newest applications fields will be presented.

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