Direct Electroplating on Indium-Tin-Oxide-Coated Textured and Polished Silicon Substrates via Transition Metal Alloyed Interlayers

Abstract

In this study Fe electroplating is used on polished or pyramidally textured indium-tin-oxide (ITO)-coated silicon substrates as an initial layer for subsequent Ni and Cu plating. Up to 15 μm thick Cu layers are deposited on the Ni/Fe intermediate layer. The adhesion strength of this metal layer stack is qualitatively shown by the scotch tape method and quantified by measuring the pull-off stress of the metal stack on ITO. 1.44 MPa and 1.28 MPa have to be applied to pull off the metal stack from polished and pyramidally textured substrates, respectively. Electrical contact properties are measured by circular transmission line model (CTLM) structures. Very low contact resistivity for electroplated metal on ITO of 6.5 × 10-7 Ω cm−2 and 9.0 × 10−7 Ω cm−2 with transfer lengths of 487 nm and 720 nm are determined for polished and pyramidally textured substrates, respectively.