Abstract
A by-inspection analysis and synthesis method for multiphase switched-current (SI) circuits using signal-flow graph (SFG) techniques is presented. The SFG is derived on the transistor level and the method is primarily useful for the hand analysis and design of small and medium-size SI circuits (e.g. SI filters, decimators, interpolators). Tables of commonly used SI circuits, in which the corresponding SFGs and circuits are given, make the derivation easy and fast. From the SFGs, not only the overall discrete-time transfer function, but also those in-between individual switching phases, are obtainable. With the proposed method it is straightforward to include non-ideal effects, such as finite output resistance of MOS transistors, clock-feedthrough and settling error. The method is also a useful tool for the synthesis of new SI circuits. It is shown that every low-sensitivity switched-capacitor (SC) circuit can be mapped directly into a low-sensitivity SI circuit with a corresponding topology. Examples of transformed SC circuits are given and two new double sampling integrators are introduced. © 1998 John Wiley & Sons, Ltd.
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