Digital-domain Chopping Technique for PLL-Based Sensor Interfaces

Abstract

Highly-digital, time-/frequency-based architectures have become an attractive alternative to amplitude-based techniques for sensor interfaces due to their high time resolution, low power and area scalability potential. However, even though thermal noise can be addressed by applying oversampling, offset and 1/f noise limit the resolution at low frequencies. Therefore, dynamic offset cancellation techniques like chopping and autozeroing, used in traditional circuits, must be adapted to such time-based implementations. This paper presents a digital-domain chopping technique suited for offset and 1/f-noise cancellation in PLL-based sensor interfaces. System-level simulations demonstrate a resolution increase from 11 to 15 bits for a 200Hz signal bandwidth.