Abstract
This paper discusses the modeling of a multi-mode digitally controlled switching mode buck converter to power a system-on-chip (SOC). It operates in digital pulse width modulation mode under heavy and medium load conditions, whereas in digital pulse frequency modulation mode it operates under light load conditions to obtain high-power conversion efficiency over a wide range of load current. In PWM mode of operation, Σ−∆ modulator-based digital pulse width modulator (DPWM) is implemented which provides high-resolution, low-power architecture to supply accurate, precise and low ripple content voltage to SOCs. A type III compensator is designed to improve the dynamic performance of the buck converter. Maximum efficiency of 88.48% is obtained at 0.2 A under PWM mode of operation. An output voltage accuracy of 0.25% is achieved against a target value of 1%. The load current and line voltage transient responses are verified by considering the different range of load current and line voltage variations. As an example, for a load variation from 150 to 400 mA, the undershoot is 30 mV, and when the load varies from 400 to 150 mA, the overshoot is 32 mV. The % peak overshoot/undershoot is around 3%. The response time of the power supply when load variations occur (150–400 mA and vice versa) is 3 μs. The steady-state output voltage is 1.002 V, when the input battery voltage varied from 2.5 to 3.2 V and vice versa; in addition, the undershoot and overshoot in output voltage are 20 and 25 mV, respectively. The time taken by the power supply to settle to a steady value of 1.0025 is 10 μs. Light load or power save mode efficiency is improved by using a DPFM mode of operation. The minimum efficiency obtained is 66.62% at 0.001 A. The % efficiency lies between 66.62 and 85% for a load current range of 0.001–0.1 A
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