Abstract

Electric force microscope (EFM) testing is based on the non-linear Coulomb force interaction between a conducting EFM probe and a test point located on the conducting line of an integrated circuit (IC). It has been reported as a new and most promising testing system for IC internal contactless diagnosis without any IC preparation and without restrictions with respect to ambient conditions. But there are still very few testing techniques for the logic and the temporal analysis of digital signals. An experimental set-up to solve this deficit is realized. The present state of the performance is demonstrated by means of measurement results in the megahertz range. Pattern recognition and quantitative voltage measurements at distinct test points on a 1 μm conducting line are presented. Furthermore, IC operation states on a three-line bus structure were characterized by the newly developed testing techniques of stroboscopic voltage contrast and logic state mapping. The EFM now allows pattern recognition and characterization of internal IC operation states in correlation to topography.

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