(Digital Presentation) Substrate Effects in GaN-on-Si Hemt Technology for RF FEM Applications

Abstract

: GaN-on-Si HEMTs are emerging as a viable candidate for front-end-of-module (FEM) implementation in 5G and beyond user equipment and small-cell applications [1][2]. This is because GaN HEMTs based power amplifiers and switches have high power handling capability as well as excellent switch figure-of-merit (Ron × Coff). The cost-effective integration of GaN HEMTs on silicon substrates not only benefit from standard CMOS back-end-of-the-line processing but also wafer-level integration with Si-CMOS [1][3], enabling complex functionality and better performance than the standalone counterparts. An example can be a hybrid beamformer where GaN HEMTs can enable much smaller antenna array and therefore a smaller system form factor. For 5G wireless applications, standalone or co-integrated GaN HEMT based FEMs can lead to a more energy efficient and compact system as compared to standalone Si-CMOS technologies. However, for both amplifiers and switches, GaN-on-Si HEMTs present thermal management and substrate loss related issues. In this work, we study and model the impact of GaN HEMT integration on Si substrate on RF substrate losses and non-linearities. The growth of III-N buffer is the most significant factor in determining RF losses and harmonic distortion contribution from the substrate. High temperature annealing and ion implantation steps encountered during HEMT processing can also degrade the substrate performance. In addition, we demonstrate a direct co-relation between substrate losses and harmonic distortion analogous to silicon-on-insulator technologies (Figure 1). However, the bias dependence of RF losses and harmonics show a strong time dependence (memory effects) which is more complex to model [11]. We discuss the approaches to understand and model these effects.