(Digital Presentation) High Performance Back-Channel-Etch Igzo TFT with Self-Passivate HfO2 By Backside Exposure Technology

Abstract

Recently, amorphous oxide semiconductor (AOS)-based TFTs have drawn much attention for the backplane technologies of the ultra-high resolution TFT-LCDs and AMOLEDs [1-2]. To overcome the degradation of electrical characteristics caused by the ambient, a passivation layer capsulation is proposed to solve the problem. In this work, a capping layer of HfO2 film is studied acting as both a passivation layer and an etch stop layer for TFT device structure with the back channel etching (BCE) process. The BCE type of indium-gallium-zinc-oxide (IGZO) TFT is successfully demonstrated with a self-aligned backside exposure method for the photo-mask reduction, which not only decreases the complexity of the device fabrication but also lowers the manufacturing cost [3-4].ExperimentAmorphous IGZO TFTs with a bottom gate staggered structure were fabricated in this work. A layer of metallic Mo thin film was first deposited on a glass substrate by DC sputtering and patterned as the gate electrode. It was followed by the deposition of HfO2 film as gate insulator and a-IGZO as channel layer by RF sputtering. Besides, a HfO2 capping layer was deposited on top of IGZO channel layer as the passivation and etch stop layer (ESL). The self-aligned backside exposure process was then implemented to pattern the IGZO channel layer and ESL simultaneously. And Mo source/drain (S/D) electrodes were formed to finish the BCE a-IGZO TFT manufacture. The IGZO TFT was also fabricated with a lift-off S/D process. Firstly, the exposure of the S/D area patterns was executed by removing the photoresist covered on the top of the S/D in the development process. Then, a layer of Mo film was deposited by DC sputtering, and followed by performing the lift-off process in acetone for the photoresist stripping. Thus, the open hole on S/D pattern areas will be filled with Mo and form S/D electrodes. The manufacture of lift-off S/D IGZO TFT was completed, and it will be compared with the characteristics of BCE a-IGZO TFT.Result and DiscussionThe experimental results have shown that the HfO2 capping layer can keep IGZO channel from exposing to oxygen and hydrogen in the atmosphere. Also, HfO2 capping layer could be acting as etching stop layer to protect IGZO channel from the damage during BCE process. As compared with a lift-off S/D process without BCE damage, the nearly non-degraded BCE a-IGZO TFT in this work demonstrates the compatible performance such as threshold voltage of 0.03 V, an approximately ideal sub-threshold swing of 65.8 mV/dec., field-effect mobility of 9.91 cm2/V·s, on/off current ratio of 6×107 (at VD=0.1 V), and extremely low electrical hysteresis loop of ~ 0 mV was obtained successfully. Furthermore, the self-aligned process with backside exposure could lower the cost for device fabrication by decreasing the number of photomasks, and the BCE process have the ability for channel size scaling. With the excellent characteristics mentioned above, the BCE a-IGZO TFT is highly applicable to the emerging high-resolution display technologies.Reference[1] T. Kamiya, K. Nomura , and H. Hosono, Science and Technology of Advanced Materials, vol. 11, no. 4, pp. 044305, 2010.[2] P. Y. Kuo, C. M. Chang, I. H. Liu, and P. T. Liu, Scientific reports, vol. 9, no. 1, pp. 1-7, 2019.[3] Y. Kuo, Journal of The Electrochemical Society, vol. 138, no. 2, pp. 637, 1991.[4] N. Münzenrieder, P. Voser, L. Petti, C. Zysset, L. Büthe, C. Vogt, G. A. Salvatore, and G. Tröster, IEEE Electron Device Letters, vol. 35, no. 1, pp. 69, 2014. Figure 1