Abstract

This paper proposes a new digital predistortion (DPD) scheme for linearizing millimeter-wave hybrid beamforming transmitters using observation receivers with low-bit resolution analog-to-digital converters (ADCs). To train the DPD function required to compensate for the distortions exhibited by a given sub-array (also called main sub-array), an error signal is produced by out-of-phase combining the main sub-array transmitted signal and the one generated by another sub-array (also called auxiliary sub-array) using anti-beamforming modules. The error signal is then frequency down-converted and digitized using a low-bit resolution ADC. Proof-of-concept validation experiments are conducted by applying the proposed DPD system to linearize an off-the-shelf hybrid-beamforming array comprised of four 64-element sub-arrays, operating at 28 GHz and driven with up to 800 MHz orthogonal frequency-division multiplexing modulated signals. Using the proposed DPD scheme, an observation receiver with a 4-bit ADC was sufficient to improve the adjacent channel power ratio by 10 dB and the error vector magnitude was reduced from 5.8% to 1.6%. These results are similar to those obtained using an observation receiver with 16-bit ADC.

Highlights

  • L ARGE scale multiple-antenna (LSMA) radio systems operating at millimeter-wave frequencies will be key technologies to meet the requirements of future wireless networks

  • When the auxiliary sub-array (ASA) were used during the digital predistortion (DPD) training, a 4-bit resolution analog-to-digital converters (ADCs) allowed for a reduction in the adjacent channel power ratio (ACPR) from −33 to −43 dBc, and the error vector magnitude (EVM) dropped from 5.8% to 1.64%

  • These results are comparable to the DPD performance with non-radiating ASAs when using a full resolution receiver where ACPR and EVM after DPD were reduced to −42.3 dBc and 1.68% respective

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Summary

INTRODUCTION

L ARGE scale multiple-antenna (LSMA) radio systems operating at millimeter-wave (mmwave) frequencies will be key technologies to meet the requirements of future wireless networks. The underlying mmwave power amplifiers (PAs) suffer from notably lower efficiency when compared to their sub-6 GHz counterparts They exhibit non-negligible non-linearity that significantly degrades their output signal quality. Lower complexity SISO DPD schemes have demonstrated interesting linearization capacity when applied to LSMA front-ends driven with 5G signals and operating at sub-6 GHz [5]– [10] or mmwave signals [11]–[16]. While advancements in FPGA hardware [18] help to reduce the implementation burden of the DPD engine, the power consumption of the high-speed analog-to-digital converter (ADC) stage of the TOR remains a major challenge This is because it requires both high bitresolution (typically 8-14 bits) and Giga-samples-per-second (Gsps) sampling rate to cope with the spectrum regrowth due to the PA nonlinearity (up to 5-times the signal bandwidth).

OVERVIEW AND THEORETICAL FORMULATION OF PROPOSED SISO DPD SCHEME
DPD FORMULATION
TIME DELAY AND LO PHASE-OFFSET CALIBRATION
MEASUREMENT RESULTS USING TWO ASAS AND 800 MHZ TEST SIGNAL
Findings
CONCLUSION
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