Digital polar CMOS power amplifier researches in KAIST

Abstract

Integrated circuit researches in KAIST in the area of digital polar CMOS power amplifiers (DPAs) are presented, which include a high dynamic range DPA, and a dual-power-mode output matching network for a DPA to improve low power efficiency. The high dynamic range DPA introduces the sub-amplifier cell array with LO leakage canceller to improve local oscillator (LO) leakage and a digitally controlled bias generator for transmit power control. The DPA demonstrates the output dynamic range of 102.8 dB and the digital transmit-power control (TPC) range for the WCDMA signal of 49.7 dB without the external components such as variable gain amplifier and variable attenuator. We also proposed a dual-power-mode output matching network using the switched transformer for a DPA to improve low power efficiency. The efficiency at 16 dBm is improved from 8% to 13% by using the output matching network. the DPA reconstruct 27.9-dBm WCDMA signals at 1.95 GHz with 31% efficiency.