Digital implementation using delta operator for FPGA-based induction motor emulator

Abstract

This paper investigates discretization methods of the continuous-time state-space model of an induction motor in order to design a real-time emulator (RTE). RTE allows rapid system prototyping and reduces cost of tests related to an experimental platform. RTE performances depend strongly on the choice of discretization method and the sampling period and on the setting of the data format. Shift operator, Tustin and delta operator approximations are investigated in terms of accuracy and stability. The best compromise between approximation method, sampling period value and fixed-point data arithmetic is discussed. An FPGA-based architecture of the induction machine is designed optimizing consumed FPGA resources. Simulation results carried out using Model Sim are demonstrate the superiority of the digital induction motor model based on delta operator.