Digital Equalizer Model for the Microcontroller

Abstract

An approach to the development of an equalizer mathematical model is proposed. That model is suitable for the use on the microcontroller, reduces calculations of the kernel to multiple use of relatively simple operations, which saves time and program memory. The equalizer provides satisfied processing quality with a relatively small filter order. The selected filter is a finite pulse response filter because of its linear phase frequency response, guarantee of stability at complex amplitude frequency response, as well as its inherent associativity and linearity, which easily reproduces complex amplitude frequency response. The equalizer is implemented with parallel bandpass filters and one low-pass filter, with the following sum of filtered and amplified signals. The equalizer model and low-pass filter kernel are verified in the GNU Octave environment. The model is verified by setting the frequency response of the test equalizer, and for individual filters the maximum width of the transition band and the maximum value of the ripple in the suppression band are set. The simulated equalizer kernel fully corresponds to the specified frequency response, which confirms the performance of the model.