Abstract
In this paper, a digital background error-correction technique for pipelined successive approximation analogue-to-digital converter (SAR ADC) based on Least Mean Square (LMS) algorithm is presented. This technique uses a slow but accurate ADC as a reference ADC and combines with LMS algorithm to calibrate the capacitor mismatch, gain error, reference voltage offset error of the inaccurate pipelined SAR ADC. The simulation validates the effectiveness of this technique for a pipelined SAR ADC with 16 bit resolution. The effective number of bits(ENOB) is improved from 10.31 bits to 15.66 bits.
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