Abstract

The issues related to the problem of minimizing hardware costs in the digital algorithms’ hardware and software implementation for the discrete signals’ frequency selection on programmable logic devices (PLD) and special processor microelectronic devices are considered. Possible ways to solve these problems are described based on the computational algorithms for non-recursive digital filtering (NDF) and difference digital filtering with integer coefficients use. A necessary and sufficient condition is given for using a computational algorithm’s hardware and software implementation of discrete signals’ difference digital filtering for their multi-stage discrete Fourier transform without performing arithmetic multiplication operations.

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