Abstract

Interleaved power factor correction (PFC) is widely used circuit topology due to good efficiency and power density for single-switch boost PFC. As the differential mode (DM) electromagnetic interference (EMI) noise magnitude depends upon the input current ripple, this research details a comprehensive study of DM EMI filter design for interleaved boost PFC with the aim of minimizing the component size. It is also demonstrated that the different numbers of interleaved stages and switching frequency influence the filter attenuation requirement and, thus, the EMI filter size. First, an analytical model is derived on the basis of the Norton equivalent circuit model for the differential mode noises of interleaved boost PFC within the frequency range of 9–500 kHz. The derived model can help identify the proper phase shifting among the interleaved boost converters in order to minimize the considered differential mode noises at the filter design frequency. So, a novel phase-shift method is developed to get a minimized attenuation required by a filter in Band B. Further, a volume optimization of the required DM filter was introduced based on the calculated filter attenuation and volumetric component parameters. Based on the obtained results, unconventional and conventional phase shifts have demonstrated a good performance in decreasing the EMI filter volume in Band B and Band A, respectively. A 2-kW interleaved PFC case study is presented to verify the theoretical analyses and the impact of phase-shifting on EMI filter size.

Highlights

  • Complying with harmonic standards and power factor requirement of the input AC power has resulted in the development of boost power factor correction (PFC) circuits to get an improved power factor close to unity

  • In order to validate the theoretical analyses, a two-unit interleaved boost PFC rectifier, depicted in Figure 1, operating in conduction mode (CCM) is taken into account

  • The filter size decreases as it occurs at a high frequency

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Summary

Introduction

Complying with harmonic standards and power factor requirement of the input AC power has resulted in the development of boost power factor correction (PFC) circuits to get an improved power factor close to unity. Using interleaving PFC, numerous benefits are obtained, including an increased power density, reduced overall design volume, and declined RMS current flowing through the boost capacitor, and using an interleaved configuration leads to a significant decrease in the switching frequency ripples as a result of the ripple cancelation effect [1]. This application is employed to ensure sinusoidally shaped input currents in connection with differential mode (DM). Because of the increasing demand for pulse-width modulation (PWM)

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