Abstract

Design of hardware efficient Finite duration Impulse Response (FIR) filter has drawn considerable attention amongst the researchers of late because of a number of striking features. Useful application of various intelligent optimization techniques has added special flavour to it. In this communication, we have incorporated a canonical signed digit (CSD) representation for the coefficients of multiplier-less low-pass FIR filter which have been optimized by means of a robust evolutionary computation mechanism, namely Differential Evolution (DE). As a matter of fact, each of the tap coefficients has been formulated as sums and/ or differences of powers of two. Design examples have proved the hardware efficiency of this CSD-based architecture as compared to conventional binary representation. Robustness of our approach has been substantiated by comparing its performance with a variety of state-of-the-art multiplier-less FIR filters from literature.

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