Abstract
In this work, the dielectric properties of porous Si for its use as a local substrate material for the integration on the Si wafer of millimeter-wave devices were investigated in the frequency range 140 to 210 GHz. Broadband electrical characterization of coplanar waveguide transmission lines (CPW TLines), formed on the porous Si layer, was used in this respect. It was shown that the dielectric parameters of porous Si (dielectric permittivity and loss tangent) in the above frequency range have values similar to those obtained at lower frequencies (1 to 40 GHz). More specifically, for the samples used, the obtained values were approximately 3.12 ± 0.05 and 0.023 ± 0.005, respectively. Finally, a comparison was made between the performance of the CPW TLines on a 150-μm-thick porous Si layer and on three other radiofrequency (RF) substrates, namely, on trap-rich high-resistivity Si (trap-rich HR Si), on a standard complementary metal-oxide-semiconductor (CMOS) Si wafer (p-type, resistivity 1 to 10 Ω.cm) and on quartz.PACS84.40.-x; 77.22.Ch; 81.05.Rm
Highlights
The co-integration of radiofrequency (RF) and millimeterwave passive devices with complementary metal-oxidesemiconductor (CMOS) circuitry is quite challenging due to the low resistivity of the CMOS Si substrate that introduces important losses during electromagnetic wave propagation
By comparing the performance of CPW TLines on porous Si and three other substrates used in RF, namely, a trap-rich high-resistivity (HR) Si substrate [15,16,17], a standard CMOS Si wafer (p-type, resistivity 1 to 10 Ω.cm), and a quartz substrate, we demonstrate the superiority of porous Si as a local substrate for RF and millimeter-wave on-chip device integration
Porous Si dielectric parameters in the frequency range 140 to 210 GHz Using broadband electrical measurements combined with simulations, the dielectric parameters of PSi in the frequency range 140 to 210 GHz were extracted
Summary
The co-integration of radiofrequency (RF) and millimeterwave passive devices with complementary metal-oxidesemiconductor (CMOS) circuitry is quite challenging due to the low resistivity of the CMOS Si substrate that introduces important losses during electromagnetic wave propagation (eddy currents into the substrate) Another drawback towards this integration is the high permittivity of Si (εr,Si = 11.7) that causes an increase in crosstalk between lines, a decrease in antenna efficiency, and a reduction of the frequency of operation of the inductors. A viable solution recently investigated towards this integration is the formation of a local substrate with the appropriate dielectric properties on the Si wafer, on which the RF and millimeter-wave devices will be integrated Such a substrate is a thick porous Si layer with high. Since the dielectric properties of the material depend strongly on its structure and morphology [13], it is desirable to have an experimental method to extract the dielectric parameters of the specific material used in each application
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