Abstract

The advantages of the technology of embedding actives and passives led to numerous R&D activities in recent years. Improved reliability [1], better heat management [6], the potential for further miniaturization, and the improved electrical performance by direct contacting the chips through micro vias [2] are some of the main drivers for a rapidly increasing interest in this still emerging technology. A DC-DC converter as described in [3] is a recent example of a successful commercialization. Besides the optimization of the different processes for high yield and low cost of the dielectric materials used for the component encapsulation are subjects of concern. This paper first discusses different types of dielectric materials suitable for chip embedding and their related technical challenges. A dielectric composite build-up material consisting of a copper foil with a highly b-staged reinforced layer and a resin only layer on top of it was described in previous papers already [13], [14]. This type of composite material shows some distinct technical advantages which will be discussed in the following. Its two layer resin structure can help to overcome practical problems of embedding technology due to its applicability for a wide range of component designs and its good thickness distribution and leveling characteristics. The described approach also allows the use of dielectric resins with different individual property profiles for each of the two layers opening up a multitude of possibilities to tune the characteristics of the PCB according to its particular design and layout. In order to efficiently identify the required material properties for an optimized process yield and for good reliability, a simulation study was deployed.

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