Die/Wafer Sub-Micron Alignment Strategies for Semiconductor Device Integration

Abstract

This study explores self-aligning patterns to achieve sub-micron alignment of die/wafers. We have patterned 2-d arrays of gold lines, whose width is half the periodicity, onto substrates. When commensurate patterns are brought into contact, the surface interactions between the Au lines enables high-resolution alignment, manually. Self-assembled monolayers of alkanethiols on the Au, further enhance the surface interactions, enabling alignment in less than half the time as for the uncoated die. A computation of the alignment force and torque between two featured surfaces illustrates how best to pattern surfaces to maximize the tendency to align. An array of lines with a sinusoidal modulation in their spacing is more tolerant of initial misalignment, yet retains the high registration force of periodic line arrays. The optimal registration pattern might be a single spiral, as it generates both a radial force and a torque. Such patterns on die/wafers would enable precision device integration.