Abstract

Harris Corporation has undertaken a multi-chip module (MCM) project that will develop a four-channel digital RF receiver for use in very dense, lightweight systems. This MCM is designated the Digital Drop Receiver (DDR). Each channel is comprised of three chips: two digital decimating filters, and a numerically controlled oscillator/modulator. The ICs are interconnected to the MCM substrate by both TAB (tape automated bonding) and gold wire bonding. TAB assembly is used for the VLSI chips in order to be able to pretest these circuits at their maximum operating speed (up to 33 MHz) prior to assembly, substantially reducing die rework. Hypothetical yield models were developed comparing wirebonded, untested die, and TAB'ed, pretested die. The results of these models indicated that a wirebond version could require numerous rework iterations to produce a functional module and be well beyond current MIL STD H-38534 and 1772 rework allowances, not to mention the rework survivability of the MCM substrate. The TAB'ed, pretested model predicted 100% functional modules in two rework cycles. >

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