Abstract

A 10-kbit bubble memory chip has been designed and fabricated. Testing was accomplished using a new diagnostic test system, which can drive the bubble chip at two different speeds with bias fields switched synchronously with the bubble propagation. Bias margins of the fabricated chips were analyzed and it was confirmed that a sufficient bias-margin window could be assured in long-term operation.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.