Diagnosis and Repair of Large Memories: A Critical Review and Recent Results

Abstract

As semiconductor device sizes continue to scale down, the size of random access memory (RAM) quadruples every two or three years. Dense RAM chips are susceptible to manufacturing defects with the result that the manufacturing yield may become unacceptably low. Due to the regular array structure of RAMs, one important method of increasing yield is through design for restructuring, which adds on-chip redundancy to replace faulty memory cells [1]. The most popular approach is to add spare rows and columns of bit-cells. Each spare row and column may have a dedicated programmable decoder, which can activate the spare row or column and disable the row decoder or column multiplexer of the bit-cell array. In this way any faulty memory cell can be replaced either by a spare row or by a spare column. An alternative implementation is one in which each row or column can be disconnected from the decoder or multiplexer by electrical or laser fuses [1]. The repair of a RAM chip with redundancy can be divided into two phases: a diagnosis phase to detect and locate all faulty cells and a repair phase to allocate spares for all faulty cells.