Abstract

본 논문에서는 디지털 전치 왜곡 선형화기를 위한 새로운 선형화 알고리즘을 제안하였다. 제안된 알고리즘은 DFP(Davidon-Fletcher-Powell) method를 활용하였다. 또한, 기존의 알고리즘보다 빠른 수렴 속도를 가지며, 가중치 갱신 step-size를 초기 설정값 없이 매 루틴마다 최적의 값을 갱신한다. 전력증폭기 모델링에는 전력 증폭기의 기억 효과를 모델링할 수 있는 memory polynomial 모델을 사용하였고, 선형화기의 전체적인 구성은 간접 학습 구조를 따랐다. 제안된 알고리즘의 성능 검증을 위해 기존의 LMS(Least Mean-Squares), RLS(Recursive Least squares) 알고리즘과 비교하였다. In this paper, a new linearization algorithm for DPD(Digital PreDistorter) is suggested. This new algorithm uses DFP(Davidon-Fletcher-Powell) method. This algorithm is more accurate than that of the existing algorithms, and this method renew the best-fit value in every routine with out setting the initial value of step-size. In modeling power amplifier, the memory polynomial model which can model the memory effect of the power amplifier is used. And the overall structure of linearizer is based on an indirect learning architecture. In order to verify for performance of proposed algorithm, we compared with LMS(Least Mean-Squares), RLS(Recursive Least squares) algorithm.

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