Device structures and fabrication techniques for amorphous semiconductor switching devices

Abstract

The history of structures developed at ecd for amorphous switching and memory devices is outlined and traced from the original bulk contact structure to the present all-film photo-etched devices. The types of geometries used to cover the voltage range 2–200 V are discussed. The causes for instabilities observed in some amorphous semiconductor devices are analysed. The factors influencing yield of devices are discussed with specific reference to experience on arrays of 2500 devices per square inch.