Abstract
We explore design space considerations of an ovonic threshold switch (OTS) for successful read operations in cross-point magnetic random access memory (MRAM) arrays through array-level SPICE simulations. We reveal that an appropriate threshold voltage (V th ) of the OTS considering the voltage matching with the MRAM should be used to achieve a reasonable read voltage margin. In addition, a low off-current of the OTS is required to prevent sneak-path currents, which ensures a sufficient read-out current ratio in large arrays. Based on a survey of recent literature on the OTS, we discuss how the desirable parameters can be achieved from material engineering perspective.
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